@InProceedings{Petrik:IEEE2006,
  IS = { zkontrolovano 08 Jan 2007 },
  UPDATE  = { 2006-10-31 },
  author =      { Petr{\'\i}k, Milan },
  title =       { Concept of Edge-Controlled Many-Valued {R-S} 
                  Memory Circuit },
  year =        { 2006 },
  pages =       { 10869-10873 },
  booktitle =   { IEEE World Congress on Computational Intelligence: 
                  A Joint Conference of the International Joint 
                  Conference on Neural Networks (IJCNN) 
                  IEEE International Conference on 
                  Fuzzy Systems (FUZZ-IEEE) and IEEE
                  Congress in Evolutionary Computation (CEC)},
  editor =      { Gary G. Yen },
  publisher =   { Sheraton Wall Centre },
  address =     { Vancouver, BC, Canada },
  isbn =        { 0-7803-9489-5 },
  book_pages =  { 11125 },
  month =       { July },
  day =         { 16--21 },
  venue =       { Vancouver, Canada },
  annote = { In a previous paper we have presented our approach to
    many-valued memory circuits based on a generalization of the R-S
    memory circuit (also known as R-S flip-flop) known in the
    two-valued logic.  We have also shown a construction of a
    level-controlled many-valued memory circuit. In this paper we use
    this knowledge to construct an edge-controlled many-valued memory
    circuit of type ``master-slave''.  We discuss several
    implementational problems related to the fact that the circuit is
    many-valued. },
  keywords =    { Memory circuit, flip-flop, many-valued logic, fuzzy logic,
                  hardware design, logical circuit design },
  prestige =    { international },
  authorship =  { 100 },
  project =     { 1ET101210407 },
  www         = { http://www.wcci2006.org/ },
  note =        { DVD },
}